Implementasi Reduksi Keadaan Rangkaian Digital Sekuensial Metode Bagan Implikasi

  • Theresia Prima Ari Setiyani Universitas Bina darma
  • Yohanes Suyanto Universitas Gajah Mada
Keywords: State reduction, implication chart, sequential digital circuit


The implementation of state reduction in sequential digital circuits is made for learning the topic of state reduction. The method used for state reduction is an implication chart. This method starts with reading the transition table state and transfered into the array structure. Based on this array structure a table or chart of initial implications is arranged. The next process is to change the contents of the table if there are cells that meet the requirements to be declared as identical or not identical. This process is repeated continuously until there is no change in cell contents. The state of reduction implementation is made using the Python programming language and PHP. The results of the implementation are successful for the state transition table with 1 input and 1 output.  

Author Biographies

Theresia Prima Ari Setiyani, Universitas Bina darma

Jurusan Teknik Elektro, Universitas Sanata Dharma, Yogyakarta

Yohanes Suyanto, Universitas Gajah Mada

Departemen Ilmu Komputer dan Elektronika, Universitas Gadjah Mada,


[1] M.M. Mano, 2002, Digital Design, 3rd Edition, Prentice Hall Inc.
[2] M. Murdoca, dan V. Heuring, 2002, Principles of Computer Architecture, Prentice Hall.
[3] Huffman, D. A., 1954, The synthesis of sequential switching circuits, Journal of Franklin Inst., part I, vol. 257, no. 3, pp. 161–190.
[4] E. F. Moore, 1956, Gedanken experiments on sequential machines, in Automata Studies, C. E. Shannon and J. McCarthy, Eds. Princeton, NJ: Princeton Univ. Press.
[5] J.E. Hopcroft, 1971, n log n algorithm for minimizing states in finite automata, Stanford Univ., Satnford, CA, Tech. Rep. CS 71/190.
[6] J.K. Rho, G. Hachtel, F. Somenzi, and R. Jacoby, 1994, Exact and heuristic algorithms for the minimization of incom pletely specified state machines, IEEE Trans. Computer-Aided Design, vol. 13, pp. 167–177.
[7] T. Kam, T. Villa, R. Brayton, and A. Sangiovanni-Vincentelli, , A fully implicit algorithm for exact state minimization, in Proc. ACM/IEEE Design Automation Conf., 1994, pp. 684–690.
[8] S.G. Shiva, 1998, Introduction to Logic Design, CRC Press
[9] A. B. Marcovitz, 2010, Introduction to logic design 3rd ed., McGraw-Hill Higher Education, Boston, USA.
How to Cite
T. Ari Setiyani and Y. Suyanto, “Implementasi Reduksi Keadaan Rangkaian Digital Sekuensial Metode Bagan Implikasi”, jtekno, vol. 16, no. 2, pp. 23 - 34, Oct. 2019.
Abstract viewed = 136 times
Download PDF : 88 times